intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP

Change-Id: Ib3250677ee926deaa957c83aca7479eb0159358c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15231
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 4 insertions, 1 deletions

diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index df0c5bbba5..a2ca1c1835 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -43,7 +43,10 @@ static void early_pch_init(void)
 	pci_write_config8(PCH_LPC_DEV, 0xa4, reg8);
 }
 
-void main(unsigned long bist)
+/* Platform has no romstage entry point under mainboard directory,
+ * so this one is named with prefix mainboard.
+ */
+void mainboard_romstage_entry(unsigned long bist)
 {
 	int s3resume = 0;