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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-27 07:24:17 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-28 21:15:27 +0000
commitd7205bebd53761e17e22701ca0573ffa5629d38e (patch)
tree3620a0040d5ae10a4cbce854c9025fb1d50a7016 /src/northbridge/intel/x4x
parent197a3c6cea86cb92c10c05c710dd4184c0e7ba72 (diff)
nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use
Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r--src/northbridge/intel/x4x/x4x.h6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h
index 57723364ab..05479a1602 100644
--- a/src/northbridge/intel/x4x/x4x.h
+++ b/src/northbridge/intel/x4x/x4x.h
@@ -368,7 +368,6 @@ enum ddr2_signals {
CTRL3,
};
-#ifndef __BOOTBLOCK__
void x4x_early_init(void);
void x4x_late_init(int s3resume);
u32 decode_igd_memory_size(u32 gms);
@@ -411,10 +410,9 @@ extern const u32 ddr3_c2_tab[2][3][6][2];
extern const u8 ddr3_c2_x264[3][6];
extern const u16 ddr3_c2_x23c[3][6];
+#include <device/device.h>
struct acpi_rsdp;
-#ifndef __SIMPLE_DEVICE__
unsigned long northbridge_write_acpi_tables(struct device *device,
unsigned long start, struct acpi_rsdp *rsdp);
-#endif /* __SIMPLE_DEVICE__ */
-#endif
+
#endif /* __NORTHBRIDGE_INTEL_X4X_H__ */