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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-17 20:43:04 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-23 02:36:36 +0000
commitb33c6fbfd5f9050686b97f2fe3e4b94862a96a74 (patch)
tree7ec3112b4bf33b25c3a200dee28394f1cce11aa2 /src/northbridge/intel/x4x
parent4ce0a07f0670e74dd22d5f7af4b8603db2320ded (diff)
nb/intel/x4x,sandybridge: Move INITRAM timestamps
Let's not have CBMEM hooks in between the different INITRAM timestamps. Change-Id: I46db196bcdf60361429b8a81772fa66d252ef1a3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50973 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r--src/northbridge/intel/x4x/raminit.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 586df389a8..59abe4d1de 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -684,6 +684,8 @@ void sdram_initialize(int boot_path, const u8 *spd_map)
pci_or_config8(HOST_BRIDGE, 0xf4, 1);
+ timestamp_add_now(TS_AFTER_INITRAM);
+
printk(BIOS_DEBUG, "RAM initialization finished.\n");
cbmem_was_inited = !cbmem_recovery(s.boot_path == BOOT_PATH_RESUME);
@@ -695,6 +697,5 @@ void sdram_initialize(int boot_path, const u8 *spd_map)
system_reset();
}
- timestamp_add_now(TS_AFTER_INITRAM);
printk(BIOS_DEBUG, "Memory initialized\n");
}