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authorElyes Haouas <ehaouas@noos.fr>2022-10-19 17:41:46 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-21 14:32:40 +0000
commit6f9786bbccfca6fa0b59cba726f79b2db6f0edcd (patch)
tree73232afff72b1102454d1924eedfbbfae899a582 /src/northbridge/intel/x4x
parent6c8826de8fe5b13338d064ebbc50956b411d9cd9 (diff)
nb/intel/x4x/raminit.c: Use 'enum cb_err'
Change-Id: I22d7e724e69b41c9fabdef785276dc428be2b400 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68558 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r--src/northbridge/intel/x4x/raminit.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 2f844a5b36..b4366fb005 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -132,7 +132,7 @@ static void mchinfo_ddr2(struct sysinfo *s)
printk(BIOS_WARNING, "VT-d enabled\n");
}
-static int ddr2_save_dimminfo(u8 dimm_idx, u8 *raw_spd,
+static enum cb_err ddr2_save_dimminfo(u8 dimm_idx, u8 *raw_spd,
struct abs_timings *saved_timings, struct sysinfo *s)
{
struct dimm_attr_ddr2_st decoded_dimm;
@@ -331,7 +331,7 @@ static void workaround_stacked_mode(struct sysinfo *s)
s->stacked_mode = 1;
}
-static int ddr3_save_dimminfo(u8 dimm_idx, u8 *raw_spd,
+static enum cb_err ddr3_save_dimminfo(u8 dimm_idx, u8 *raw_spd,
struct abs_timings *saved_timings, struct sysinfo *s)
{
struct dimm_attr_ddr3_st decoded_dimm;