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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-04 01:11:16 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-11 07:16:00 +0200
commitdcb688e5ec88ac1d168509fa757c4665ef335ad4 (patch)
tree63805701b01de0ea6fd64397fa4df4876a9c02a9 /src/northbridge/intel/sandybridge
parente1ea802ea69b70826b997b9bb465e0b2a3b0fce8 (diff)
CBMEM: Unify get_top_of_ram()
Change-Id: Ic40a51638873642f33c74d80ac41cf082b2fb177 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3904 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c2
-rw-r--r--src/northbridge/intel/sandybridge/raminit.h1
2 files changed, 1 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 4cd86cd9df..4abcec33cb 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -51,7 +51,7 @@ int bridge_silicon_revision(void)
return bridge_revision_id;
}
-static unsigned long get_top_of_ram(void)
+unsigned long get_top_of_ram(void)
{
/* Base of TSEG is top of usable DRAM */
u32 tom = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0,0)), TSEG);
diff --git a/src/northbridge/intel/sandybridge/raminit.h b/src/northbridge/intel/sandybridge/raminit.h
index 23bdbd9ed1..2e9b1f32f4 100644
--- a/src/northbridge/intel/sandybridge/raminit.h
+++ b/src/northbridge/intel/sandybridge/raminit.h
@@ -30,7 +30,6 @@ struct sys_info {
} __attribute__ ((packed));
void sdram_initialize(struct pei_data *pei_data);
-unsigned long get_top_of_ram(void);
int fixup_sandybridge_errata(void);
#endif /* RAMINIT_H */