diff options
author | Keith Hui <buurin@gmail.com> | 2024-02-05 19:18:43 -0500 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2024-06-08 00:19:23 +0000 |
commit | a911b758482025d46e132eeb2ed0279b65692075 (patch) | |
tree | fb8475ef03a0365132fefb82bc248468ef0a4784 /src/northbridge/intel/sandybridge | |
parent | ee126348726b24fbf6e5435bb2cf15417959a8f7 (diff) |
mb/*: Remove old USB configurations from SNB/bd82x6x boards
Remove USB configurations and data structures from northbridge
devicetree (SNB+MRC boards) and bootblock/romstage C code
(native-only SNB boards). All USB configurations are drawn from
southbridge devicetree going forward.
Change-Id: Ie1cd21077136998a6e90050c95263f2efed68a67
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81882
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
-rw-r--r-- | src/northbridge/intel/sandybridge/chip.h | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h index 82e58f6186..35e4cf76e6 100644 --- a/src/northbridge/intel/sandybridge/chip.h +++ b/src/northbridge/intel/sandybridge/chip.h @@ -80,26 +80,6 @@ struct northbridge_intel_sandybridge_config { DDR_REFRESH_RATE_DOUBLE, } ddr_refresh_rate_config; - /* - * USB Port Configuration: - * [0] = enable - * [1] = overcurrent pin - * [2] = length - * - * Ports 0-7 can be mapped to OC0-OC3 - * Ports 8-13 can be mapped to OC4-OC7 - * - * Port Length - * MOBILE: - * < 0x050 = Setting 1 (back panel, 1-5in, lowest tx amplitude) - * < 0x140 = Setting 2 (back panel, 5-14in, highest tx amplitude) - * DESKTOP: - * < 0x080 = Setting 1 (front/back panel, <8in, lowest tx amplitude) - * < 0x130 = Setting 2 (back panel, 8-13in, higher tx amplitude) - * < 0x150 = Setting 3 (back panel, 13-15in, highest tx amplitude) - */ - u16 usb_port_config[16][3]; - struct { /* 0: Disable, 1: Enable, 2: Auto, 3: Smart Auto */ u8 mode : 2; |