nb/intel/sandybridge: Always write to PEGCTL

This register needs to be written to once to lock it down. Do so.

Change-Id: I04bd496d064940b51cb9aa1ded6f5b8853ea7334
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39624
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 3 insertions, 2 deletions

diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 23c1489acb..abfc1259de 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -377,11 +377,12 @@ static void disable_peg(void)
 		/*
 		 * Set the PEG clock gating bit. Disables the IO clock on all PEG devices.
 		 *
-		 * FIXME: If not clock gating, this register still needs to be written to once,
-		 *        to lock it down. Also, never clock gate on Ivy Bridge stepping A0!
+		 * FIXME: Never clock gate on Ivy Bridge stepping A0!
 		 */
 		MCHBAR32_OR(PEGCTL, 1);
 		printk(BIOS_DEBUG, "Disabling PEG IO clock.\n");
+	} else {
+		MCHBAR32_AND(PEGCTL, ~1);
 	}
 }