diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2017-10-28 18:20:11 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-14 10:02:14 +0000 |
| commit | dd662870dd9da0be937c593b0b62f3b5c8030cf7 (patch) | |
| tree | 73b465c828ea52e50eb4a856eaee47cad40a36eb /src/northbridge/intel/sandybridge/raminit_common.h | |
| parent | 05d4bf7ea76114dcbd21f8302e7152f40d806f18 (diff) | |
nb/intel/sandybridge/raminit: Add ECC support
Add ECC support for native raminit on SandyBridge/IvyBridge.
Change-Id: I1206746332c9939a78b67e7b48d3098bdef8a2ed
Depends-On: I5b7599746195cfa996a48320404a8dbe6820483a
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/22215
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_common.h')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h index ea3d66687e..93541b50fd 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.h +++ b/src/northbridge/intel/sandybridge/raminit_common.h @@ -24,7 +24,7 @@ #define NUM_CHANNELS 2 #define NUM_SLOTRANKS 4 #define NUM_SLOTS 2 -#define NUM_LANES 8 +#define NUM_LANES 9 #define NO_RANKSEL (~(1 << 16)) #define IOSAV_MRS (0x1f000) @@ -43,7 +43,7 @@ /* * WARNING: Do not forget to increase MRC_CACHE_VERSION when the saved data is changed! */ -#define MRC_CACHE_VERSION 4 +#define MRC_CACHE_VERSION 5 typedef struct odtmap_st { u16 rttwr; @@ -134,6 +134,8 @@ typedef struct ramctr_timing_st { bool ecc_supported; bool ecc_forced; + bool ecc_enabled; + int lanes; /* active lanes: 8 or 9 */ int edge_offset[3]; int timC_offset[3]; @@ -149,7 +151,7 @@ typedef struct ramctr_timing_st { #define SOUTHBRIDGE PCI_DEV(0, 0x1f, 0) -#define FOR_ALL_LANES for (lane = 0; lane < NUM_LANES; lane++) +#define FOR_ALL_LANES for (lane = 0; lane < ctrl->lanes; lane++) #define FOR_ALL_CHANNELS for (channel = 0; channel < NUM_CHANNELS; channel++) #define FOR_ALL_POPULATED_RANKS for (slotrank = 0; slotrank < NUM_SLOTRANKS; slotrank++) if (ctrl->rankmap[channel] & (1 << slotrank)) #define FOR_ALL_POPULATED_CHANNELS for (channel = 0; channel < NUM_CHANNELS; channel++) if (ctrl->rankmap[channel]) @@ -170,7 +172,7 @@ void dram_find_common_params(ramctr_timing *ctrl); void dram_xover(ramctr_timing *ctrl); void dram_timing_regs(ramctr_timing *ctrl); void dram_dimm_mapping(ramctr_timing *ctrl); -void dram_dimm_set_mapping(ramctr_timing *ctrl); +void dram_dimm_set_mapping(ramctr_timing *ctrl, int training); void dram_zones(ramctr_timing *ctrl, int training); unsigned int get_mem_min_tck(void); void dram_memorymap(ramctr_timing *ctrl, int me_uma_size); @@ -193,6 +195,7 @@ void final_registers(ramctr_timing *ctrl); void restore_timings(ramctr_timing *ctrl); int try_init_dram_ddr3(ramctr_timing *ctrl, int fast_boot, int s3resume, int me_uma_size); +void channel_scrub(ramctr_timing *ctrl); bool get_host_ecc_cap(void); bool get_host_ecc_forced(void); |