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authorVagiz Trakhanov <rakkin@autistici.org>2017-09-28 14:42:11 +0000
committerNico Huber <nico.h@gmx.de>2017-10-16 20:11:46 +0000
commit1dd448c0cfe00208e068cdab6fc20f983c9df0c4 (patch)
treedbe592337506736f70682965e9e4441653f549e5 /src/northbridge/intel/sandybridge/early_init.c
parentc06a3f72f82f46eb2b56c7b84a605001f7c38049 (diff)
nb/intel: Add Ivy Bridge Server (Xeon-E3v2) PCI IDs
Change-Id: I1899dbe9498a0cc83b65b4bc1c6c0a555637fd05 Signed-off-by: Vagiz Tarkhanov <rakkin@autistici.org> Reviewed-on: https://review.coreboot.org/21753 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge/early_init.c')
-rw-r--r--src/northbridge/intel/sandybridge/early_init.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index 3580f3509d..2f1b790bcb 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -98,6 +98,7 @@ static void sandybridge_setup_graphics(void)
case 0x0156: /* IvyBridge */
case 0x0162: /* IvyBridge */
case 0x0166: /* IvyBridge */
+ case 0x016a: /* IvyBridge */
break;
default:
printk(BIOS_DEBUG, "Graphics not supported by this CPU/chipset.\n");