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authorArthur Heymans <arthur@aheymans.xyz>2018-06-03 12:16:24 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-06-05 07:53:48 +0000
commit6fcd7b8eb1ee650daa939593e8cbb3939f7c1188 (patch)
tree0abd85cd08ef06b2d089711a2a3463a454d8ea7f /src/northbridge/intel/sandybridge/Makefile.inc
parentc2ccc9782d1151efb7eba3ea92feded2ed555391 (diff)
cpu/intel/model_206ax: Switch to POSTCAR_STAGE
Tested on Lenovo Thinkpad X220 with both native raminit and mrc.bin. Change-Id: I5e1a1175d79af4dc079a5a08a464eef08de0bcbf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/26791 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Makefile.inc')
-rw-r--r--src/northbridge/intel/sandybridge/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc
index d08b141b3d..3d8da0c4bc 100644
--- a/src/northbridge/intel/sandybridge/Makefile.inc
+++ b/src/northbridge/intel/sandybridge/Makefile.inc
@@ -46,4 +46,6 @@ romstage-y += ../../../arch/x86/walkcbfs.S
smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
+postcar-y += ram_calc.c
+
endif