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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-01 11:21:53 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-04 00:53:06 +0200 |
| commit | fbdb085549b6c500e12dc2fb21143a197b4be042 (patch) | |
| tree | 88065a88e408c2b6694d7de039bb57fc7afddddb /src/northbridge/intel/sandybridge/Kconfig | |
| parent | 15c4ab7adf594e0707cdedded8fe6797b17da56a (diff) | |
intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULT
Change all PCI configuration accesses to MMIO on all boards
with SandyBridge and IvyBridge. To enable MMIO style access,
add explicit PCI IO config write in the bootblock.
Change-Id: I8f957a80bf57df000897c5a080dd5ff131b1ec0d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3576
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Kconfig')
| -rw-r--r-- | src/northbridge/intel/sandybridge/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 3a65782e92..59b618729b 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -20,11 +20,15 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE bool select CACHE_MRC_BIN + select MMCONF_SUPPORT + select MMCONF_SUPPORT_DEFAULT select CPU_INTEL_MODEL_206AX config NORTHBRIDGE_INTEL_IVYBRIDGE bool select CACHE_MRC_BIN + select MMCONF_SUPPORT + select MMCONF_SUPPORT_DEFAULT select CPU_INTEL_MODEL_306AX if NORTHBRIDGE_INTEL_SANDYBRIDGE @@ -103,6 +107,10 @@ endif if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE +config BOOTBLOCK_NORTHBRIDGE_INIT + string + default "northbridge/intel/sandybridge/bootblock.c" + config DCACHE_RAM_MRC_VAR_SIZE hex default 0x4000 |