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authorAlexander Couzens <lynxis@fe80.eu>2016-03-09 14:36:46 +0100
committerMartin Roth <martinroth@google.com>2016-03-11 19:00:14 +0100
commit92fc072c2faf3d1be82f50ee3feda42461e9ac16 (patch)
treedf2232c7db3a895bbf854fe87a73ac2f2dac13e6 /src/northbridge/intel/sandybridge/Kconfig
parent81c5c761b305dd62019759e5e39248b02c0af820 (diff)
northbridge/intel: move mrccache.c of sandybridge + haswell to common
The sourcecode is 99% the same. Only two lines differ, but not in functionality. Also rename mrccache.c -> mrc_cache.c Tested-on: boot + suspend/resume on x220 Change-Id: I36f79d066336f223b608c70c847ea6ea6e4ad287 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/14007 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Kconfig')
-rw-r--r--src/northbridge/intel/sandybridge/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 9b90f36178..64f4a14c3f 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -18,6 +18,7 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
bool
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
+ select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
select CPU_INTEL_MODEL_206AX
select HAVE_DEBUG_RAM_SETUP
select INTEL_GMA_ACPI
@@ -26,6 +27,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
bool
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
+ select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
select CPU_INTEL_MODEL_306AX
select HAVE_DEBUG_RAM_SETUP
select INTEL_GMA_ACPI