diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-01 13:43:02 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-01 20:32:15 +0000 |
| commit | f1b58b78351d7ed220673e688a2f7bc9e96da4e2 (patch) | |
| tree | d8aae223f0e426f189cb4750b972a31e09d46b88 /src/northbridge/intel/pineview | |
| parent | 44e89af6e609874f2f18d30f1e66dce8b5a98eff (diff) | |
device/pci: Fix PCI accessor headers
PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.
Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/pineview')
| -rw-r--r-- | src/northbridge/intel/pineview/bootblock.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/early_init.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/northbridge.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/ram_calc.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/raminit.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/romstage.c | 1 |
6 files changed, 6 insertions, 0 deletions
diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c index 1fab845db2..f3eab492f5 100644 --- a/src/northbridge/intel/pineview/bootblock.c +++ b/src/northbridge/intel/pineview/bootblock.c @@ -12,6 +12,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #define PCIEXBAR 0x60 #define MMCONF_256_BUSSES 16 #define ENABLE 1 diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index 89744289a2..11dc203d1e 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -18,6 +18,7 @@ #include <stdlib.h> #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include <device/pci.h> #include <halt.h> diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index ec2c902b90..94aed89fc2 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -17,6 +17,7 @@ #include <cbmem.h> #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/intel/pineview/ram_calc.c b/src/northbridge/intel/pineview/ram_calc.c index 21b926bc9a..cf9db988e1 100644 --- a/src/northbridge/intel/pineview/ram_calc.c +++ b/src/northbridge/intel/pineview/ram_calc.c @@ -17,6 +17,7 @@ #define __SIMPLE_DEVICE__ #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci_def.h> #include <console/console.h> diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c index ed633fd745..1b2ad8de6f 100644 --- a/src/northbridge/intel/pineview/raminit.c +++ b/src/northbridge/intel/pineview/raminit.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <delay.h> diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c index 10ac0f53b4..0d2cc368da 100644 --- a/src/northbridge/intel/pineview/romstage.c +++ b/src/northbridge/intel/pineview/romstage.c @@ -20,6 +20,7 @@ #include <lib.h> #include <timestamp.h> #include <console/console.h> +#include <device/pci_ops.h> #include <cbmem.h> #include <romstage_handoff.h> #include <southbridge/intel/i82801gx/i82801gx.h> |