summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/pineview
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2021-01-18 00:48:27 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-19 23:04:34 +0000
commit15ef9b651312fef3842fb5541e835ada8751b3fe (patch)
tree6f40e5afb285770e28fcf227b5ae5f1ad6fbc131 /src/northbridge/intel/pineview
parenta6e4afc1cb44124562cdac1bea1c9fd81b9ecf27 (diff)
nb/intel/i945/northbridge.c: Reserve upper part of lower memory
This memory is used for option roms and BIOS. This matches the ACPI code. Change-Id: I53dd4b967569889108352ca70086a12ce252e8e0 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49624 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/pineview')
0 files changed, 0 insertions, 0 deletions