diff options
| author | Damien Zammit <damien@zamaudio.com> | 2015-05-03 21:34:38 +1000 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-11-24 14:40:44 +0100 |
| commit | 62477931c88c701617445a3a23769583e7b830b5 (patch) | |
| tree | 9d988a958c75a9722675af1aec498449441c2fb4 /src/northbridge/intel/pineview/Makefile.inc | |
| parent | 0cf0805e924b834c30fe290412e94e42f8f49cfb (diff) | |
northbridge/intel/pineview: Add minimal Pineview northbridge
Based on i945. Tested on Intel D510MO mainboard,
board boots to UART console with this code.
Change-Id: I1d92a1aa6d6d767bda8379807dc26b50b9de75c9
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/10073
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/intel/pineview/Makefile.inc')
| -rw-r--r-- | src/northbridge/intel/pineview/Makefile.inc | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc new file mode 100644 index 0000000000..9330b1787b --- /dev/null +++ b/src/northbridge/intel/pineview/Makefile.inc @@ -0,0 +1,24 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2007-2009 coresystems GmbH +# Copyright (C) 2015 Damien Zammit <damien@zamaudio.com> +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +ifeq ($(CONFIG_NORTHBRIDGE_INTEL_PINEVIEW),y) + +ramstage-y += ram_calc.c +ramstage-y += acpi.c + +romstage-y += ram_calc.c + +endif |