diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/northbridge/intel/nehalem | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel/nehalem')
| -rw-r--r-- | src/northbridge/intel/nehalem/acpi/nehalem.asl | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/nehalem/early_init.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/nehalem/gma.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/nehalem/northbridge.c | 6 |
4 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/intel/nehalem/acpi/nehalem.asl b/src/northbridge/intel/nehalem/acpi/nehalem.asl index 664022bf0f..df8aad7c62 100644 --- a/src/northbridge/intel/nehalem/acpi/nehalem.asl +++ b/src/northbridge/intel/nehalem/acpi/nehalem.asl @@ -33,7 +33,7 @@ Device (PDRC) Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH -#if IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS) +#if CONFIG(CHROMEOS_RAMOOPS) Memory32Fixed(ReadWrite, CONFIG_CHROMEOS_RAMOOPS_RAM_START, CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE) #endif diff --git a/src/northbridge/intel/nehalem/early_init.c b/src/northbridge/intel/nehalem/early_init.c index 2c958a4c86..a5cac7b19a 100644 --- a/src/northbridge/intel/nehalem/early_init.c +++ b/src/northbridge/intel/nehalem/early_init.c @@ -73,7 +73,7 @@ static void nehalem_setup_bars(void) pci_write_config8(PCI_DEV(0xff, 0x00, 1), QPD0F1_PAM(5), 0x33); pci_write_config8(PCI_DEV(0xff, 0x00, 1), QPD0F1_PAM(6), 0x33); -#if IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) +#if CONFIG(ELOG_BOOT_COUNT) /* Increment Boot Counter for non-S3 resume */ if ((inw(DEFAULT_PMBASE + PM1_STS) & WAK_STS) && ((inl(DEFAULT_PMBASE + PM1_CNT) >> 10) & 7) != SLP_TYP_S3) @@ -82,7 +82,7 @@ static void nehalem_setup_bars(void) printk(BIOS_DEBUG, " done.\n"); -#if IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) +#if CONFIG(ELOG_BOOT_COUNT) /* Increment Boot Counter except when resuming from S3 */ if ((inw(DEFAULT_PMBASE + PM1_STS) & WAK_STS) && ((inl(DEFAULT_PMBASE + PM1_CNT) >> 10) & 7) == SLP_TYP_S3) diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index be17e2fa12..86fc583f88 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -603,7 +603,7 @@ static void gma_func0_init(struct device *dev) /* Init graphics power management */ gma_pm_init_pre_vbios(dev); - if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { + if (CONFIG(MAINBOARD_USE_LIBGFXINIT)) { struct northbridge_intel_nehalem_config *conf = dev->chip_info; int lightup_ok; printk(BIOS_SPEW, "Initializing VGA without OPROM."); diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c index 6906714457..8a4f64c809 100644 --- a/src/northbridge/intel/nehalem/northbridge.c +++ b/src/northbridge/intel/nehalem/northbridge.c @@ -78,7 +78,7 @@ static void add_fixed_resources(struct device *dev, int index) reserved_ram_resource(dev, index++, 0xc0000 >> 10, (0x100000 - 0xc0000) >> 10); -#if IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS) +#if CONFIG(CHROMEOS_RAMOOPS) reserved_ram_resource(dev, index++, CONFIG_CHROMEOS_RAMOOPS_RAM_START >> 10, CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE >> 10); @@ -90,7 +90,7 @@ static void pci_domain_set_resources(struct device *dev) assign_resources(dev->link_list); } -#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +#if CONFIG(HAVE_ACPI_TABLES) static const char *northbridge_acpi_name(const struct device *dev) { if (dev->path.type == DEVICE_PATH_DOMAIN) @@ -114,7 +114,7 @@ static struct device_operations pci_domain_ops = { .enable_resources = NULL, .init = NULL, .scan_bus = pci_domain_scan_bus, -#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +#if CONFIG(HAVE_ACPI_TABLES) .acpi_name = northbridge_acpi_name, #endif }; |