diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-05-24 20:25:58 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-06-22 12:30:15 +0000 |
| commit | 27d6299d51744bda549b7764b8fde909ad812e33 (patch) | |
| tree | c30a57ff78e57c9c79a74c4b27cc6e5dfbc94a49 /src/northbridge/intel/ironlake | |
| parent | 37b161fb96c602765fef9f64415f809830b915a4 (diff) | |
device/resource: Add _kb postfix for resource allocators
There is a lot of going back-and-forth with the KiB arguments, start
the work to migrate away from this.
Change-Id: I329864d36137e9a99b5640f4f504c45a02060a40
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64658
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/ironlake')
| -rw-r--r-- | src/northbridge/intel/ironlake/northbridge.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index b74909faf3..d2f5c79fe1 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -54,8 +54,8 @@ static void add_fixed_resources(struct device *dev, int index) resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; - mmio_resource(dev, index++, legacy_hole_base_k, (0xc0000 / KiB) - legacy_hole_base_k); - reserved_ram_resource(dev, index++, 0xc0000 / KiB, (0x100000 - 0xc0000) / KiB); + mmio_resource_kb(dev, index++, legacy_hole_base_k, (0xc0000 / KiB) - legacy_hole_base_k); + reserved_ram_resource_kb(dev, index++, 0xc0000 / KiB, (0x100000 - 0xc0000) / KiB); } #if CONFIG(HAVE_ACPI_TABLES) @@ -105,10 +105,10 @@ static void mc_read_resources(struct device *dev) printk(BIOS_DEBUG, "TOUUD: 0x%x\n", (unsigned int)touud); /* Report the memory regions */ - ram_resource(dev, index++, 0, 0xa0000 / KiB); - ram_resource(dev, index++, 1 * MiB / KiB, (tseg_base - 1 * MiB) / KiB); + ram_resource_kb(dev, index++, 0, 0xa0000 / KiB); + ram_resource_kb(dev, index++, 1 * MiB / KiB, (tseg_base - 1 * MiB) / KiB); - mmio_resource(dev, index++, tseg_base / KiB, CONFIG_SMM_TSEG_SIZE / KiB); + mmio_resource_kb(dev, index++, tseg_base / KiB, CONFIG_SMM_TSEG_SIZE / KiB); reg16 = pci_read_config16(pcidev_on_root(0, 0), GGC); const int uma_sizes_gtt[16] = @@ -130,17 +130,17 @@ static void mc_read_resources(struct device *dev) if (gtt_base > tseg_end) { /* Reserve the gap. MMIO doesn't work in this range. Keep it uncacheable, though, for easier MTRR allocation. */ - mmio_resource(dev, index++, tseg_end / KiB, (gtt_base - tseg_end) / KiB); + mmio_resource_kb(dev, index++, tseg_end / KiB, (gtt_base - tseg_end) / KiB); } - mmio_resource(dev, index++, gtt_base / KiB, uma_size_gtt * KiB); - mmio_resource(dev, index++, igd_base / KiB, uma_size_igd * KiB); + mmio_resource_kb(dev, index++, gtt_base / KiB, uma_size_gtt * KiB); + mmio_resource_kb(dev, index++, igd_base / KiB, uma_size_igd * KiB); if (touud > 4096) - ram_resource(dev, index++, (4096 * KiB), ((touud - 4096) * KiB)); + ram_resource_kb(dev, index++, (4096 * KiB), ((touud - 4096) * KiB)); /* This memory is not DMA-capable. */ if (touud >= 8192 - 64) - bad_ram_resource(dev, index++, 0x1fc000000ULL / KiB, 0x004000000 / KiB); + bad_ram_resource_kb(dev, index++, 0x1fc000000ULL / KiB, 0x004000000 / KiB); add_fixed_resources(dev, index); } |