diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:41:06 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-21 16:32:10 +0000 |
| commit | dddd1cc6913bd0cbb814b68de7315cb84bfb9c2f (patch) | |
| tree | e4ad63b1db7fbeaf14ad5bf60046a0ed063b86a5 /src/northbridge/intel/i945 | |
| parent | 7aa3372ce21565962d4cb1090e1f194b6f33f968 (diff) | |
src/northbridge: Drop unneeded empty lines
Change-Id: I5f3118f0f855160ed49adc543b6169fccd7520ee
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44593
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/i945')
| -rw-r--r-- | src/northbridge/intel/i945/gma.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i945/i945.h | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i945/northbridge.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/i945/raminit.c | 2 |
4 files changed, 0 insertions, 7 deletions
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index a4cdf70adf..118d02c32c 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -584,7 +584,6 @@ static u32 freq_to_blc_pwm_ctl(struct device *const dev, u16 pwm_freq) return BLM_LEGACY_MODE | ((blc_mod / 2) << 17) | ((blc_mod / 2) << 1); } - static void panel_setup(u8 *mmiobase, struct device *const dev) { const struct northbridge_intel_i945_config *const conf = dev->chip_info; @@ -749,7 +748,6 @@ static struct device_operations gma_func0_ops = { .acpi_name = gma_acpi_name, }; - static struct device_operations gma_func1_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 64a945dca4..4b79b2b145 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -87,7 +87,6 @@ #define PEGCC 0x208 /* 32bit */ #define PEGSTS 0x214 /* 32bit */ - /* Device 0:2.0 PCI configuration space (Graphics Device) */ #define IGD_DEV PCI_DEV(0, 2, 0) @@ -96,7 +95,6 @@ #define BSM 0x5c #define GCFC 0xf0 /* Graphics Clock Frequency & Gating Control */ - /* * MCHBAR */ diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 103b40f831..cfa527f4cc 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -99,7 +99,6 @@ static void mch_domain_read_resources(struct device *dev) printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%xK\n", delta_cbmem); - /* The following needs to be 2 lines, otherwise the second * number is always 0 */ diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 2a8a42bedb..a1a9a9c0b6 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -318,7 +318,6 @@ static void gather_common_timing(struct sys_info *sysinfo, struct timings *saved printk(BIOS_DEBUG, "only Single Channel Operation.\n"); } - for (i = 0; i < (2 * DIMM_SOCKETS); i++) { int device = get_dimm_spd_address(sysinfo, i), bytes_read; struct dimm_attr_ddr2_st dimm_info; @@ -432,7 +431,6 @@ static void gather_common_timing(struct sys_info *sysinfo, struct timings *saved i, sysinfo->banksize[(i * 2) + 1] * 32); } - sysinfo->rows[i] = dimm_info.row_bits; sysinfo->cols[i] = dimm_info.col_bits; sysinfo->banks[i] = dimm_info.banks; |