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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2016-04-29 00:38:29 -0500
committerTimothy Pearson <tpearson@raptorengineeringinc.com>2016-05-01 00:49:24 +0200
commit7f731f8d4f0d4dbc109869032f4e993995eac045 (patch)
tree2b891f225d47cad53d4b843d854ee12b4cca1d2b /src/northbridge/intel/i945
parentefcee9fadd496945c55828c79dff8e0b19ae0053 (diff)
nb/amd/mct_ddr3: Fix x4 DIMM receiver enable training on Fam15h
The existing Family 15h receiver enable training code stored temporary delay values in the wrong variables, leading to the requisite averaging of delays across nibbles not being applied. This in turn made x4 DIMMs less stable than they should have been. Store temporary nibble delay values in a dedicated array. Change-Id: Ic5da898af7d689db4110211f89b886ccdbb5f78f Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/14541 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
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