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authorJulius Werner <jwerner@chromium.org>2019-03-07 17:07:26 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-25 11:03:49 +0000
commit5d1f9a009647c741e8587015b14f1e852e1c489e (patch)
treeb6e87bac2f8a578b7bee6b73111e04bd3750eeb8 /src/northbridge/intel/i945
parent2de19038beffa154eefe40755b607aa9f94d9f9f (diff)
Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX)
This patch cleans up remaining uses of raw boolean Kconfig values I could find by wrapping them with CONFIG(). The remaining naked config value warnings in the code should all be false positives now (although the process was semi-manual and involved some eyeballing so I may have missed a few). Change-Id: Ifa0573a535addc3354a74e944c0920befb0666be Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31813 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/i945')
-rw-r--r--src/northbridge/intel/i945/gma.c4
-rw-r--r--src/northbridge/intel/i945/raminit.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index ee656de66a..9c4f410d02 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -677,10 +677,10 @@ static void gma_ngi(struct device *const dev)
if (err == 0)
gfx_set_init_done(1);
/* Linux relies on VBT for panel info. */
- if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) {
+ if (CONFIG(NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) {
generate_fake_intel_oprom(&conf->gfx, dev, "$VBT CALISTOGA");
}
- if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC) {
+ if (CONFIG(NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
generate_fake_intel_oprom(&conf->gfx, dev, "$VBT LAKEPORT-G");
}
}
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 05b577787d..be3d17a2fd 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -284,7 +284,7 @@ static void sdram_detect_errors(struct sys_info *sysinfo)
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa2, reg8);
/* clear self refresh status if check is disabled or not a resume */
- if (!CONFIG_CHECK_SLFRCS_ON_RESUME
+ if (!CONFIG(CHECK_SLFRCS_ON_RESUME)
|| sysinfo->boot_path != BOOT_PATH_RESUME) {
MCHBAR8(SLFRCS) |= 3;
} else {