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| author | Patrick Georgi <patrick@georgi-clan.de> | 2013-02-09 15:56:04 +0100 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-02-11 20:51:33 +0100 |
| commit | 8cc846897132f6d6baa49118005815aefb5f560f (patch) | |
| tree | 113b69cccb4728084be3c5f83f04fe9f56db43e5 /src/northbridge/intel/i945/udelay.c | |
| parent | 3b19cbae37ab340bd530e35412800a171733fda6 (diff) | |
Intel: Replace MSR 0xcd with MSR_FSB_FREQ
And move the corresponding #define to speedstep.h
Change-Id: I8c884b8ab9ba54e01cfed7647a59deafeac94f2d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2339
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/i945/udelay.c')
| -rw-r--r-- | src/northbridge/intel/i945/udelay.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/udelay.c b/src/northbridge/intel/i945/udelay.c index ce5e9d8943..be560085e1 100644 --- a/src/northbridge/intel/i945/udelay.c +++ b/src/northbridge/intel/i945/udelay.c @@ -22,6 +22,7 @@ #include <stdint.h> #include <cpu/x86/tsc.h> #include <cpu/x86/msr.h> +#include <cpu/intel/speedstep.h> /* Simple 32- to 64-bit multiplication. Uses 16-bit words to avoid overflow. */ static inline void multiply_to_tsc(tsc_t *const tsc, const u32 a, const u32 b) @@ -46,7 +47,7 @@ void udelay(u32 us) u32 fsb = 0, divisor; u32 d; /* ticks per us */ - msr = rdmsr(0xcd); + msr = rdmsr(MSR_FSB_FREQ); switch (msr.lo & 0x07) { case 5: fsb = 400; |