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authorEdwin Beasant <edwin_beasant@virtensys.com>2010-07-06 21:05:04 +0000
committerMyles Watson <mylesgw@gmail.com>2010-07-06 21:05:04 +0000
commiteb50c7d922e91f0247b3705eccb2d2eec638c277 (patch)
tree2def570d089b2f6deb2beac165e18756a578e308 /src/northbridge/intel/i945/raminit.c
parent8376831eafc1be1175529fd21e0d2fe40339d4eb (diff)
Re-integrate "USE_OPTION_TABLE" code.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i945/raminit.c')
-rw-r--r--src/northbridge/intel/i945/raminit.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 1922fab4b6..b05a553c5a 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -19,6 +19,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
+#include <pc80/mc146818rtc.h>
#include <spd.h>
#include "raminit.h"
#include "i945.h"
@@ -2671,7 +2672,7 @@ static void sdram_save_receive_enable(void)
values[3] |= (reg32 >> (24 - 4)) & 0xf0;
/* coreboot only uses bytes 0 - 127 for its CMOS values so far
- * so we grad bytes 128 - 131 to save the receive enable values
+ * so we grab bytes 128 - 131 to save the receive enable values
*/
for (i=0; i<4; i++)