diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-10-26 17:12:21 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-10-26 17:12:21 +0000 |
| commit | aca6ec66bf7048e77ec960bb751a04e6b0528c70 (patch) | |
| tree | f8fbc185686787e9453f0e6f229d88f38561333d /src/northbridge/intel/i945/raminit.c | |
| parent | 3b314023802c7429012e5f09652047e0b32fb97a (diff) | |
Kontron 986LCD-M update
- run ACPI code through preprocessor so we get the same values
as the C code
- fix PCIe x16 slot
- fix ICH7 Azalia/HDA driver
- SMI/GNVS update security fix (only allow struct pointer update once)
- ACPI updates
- IDE driver fixes
- add cmos options for disabling onboard ethernet and controlling system fan
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i945/raminit.c')
| -rw-r--r-- | src/northbridge/intel/i945/raminit.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 3084072389..53a7455ea9 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -2481,6 +2481,9 @@ static void sdram_program_receive_enable(struct sys_info *sysinfo) { MCHBAR32(REPC) |= (1 << 0); + /* enable upper CMOS */ + RCBA32(0x3400) = (1 << 2); + /* Program Receive Enable Timings */ if (sysinfo->boot_path == BOOT_PATH_RESUME) { sdram_recover_receive_enable(); @@ -2904,9 +2907,7 @@ void sdram_initialize(int boot_path) sdram_thermal_management(); /* Normal Operations */ - if (boot_path == BOOT_PATH_NORMAL) { - sdram_init_complete(); - } + sdram_init_complete(); /* Program Receive Enable Timings */ sdram_program_receive_enable(&sysinfo); @@ -2924,3 +2925,11 @@ void sdram_initialize(int boot_path) sdram_setup_processor_side(); } +unsigned long get_top_of_ram(void) +{ + /* This will not work if TSEG is in place! */ + u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c); + + return (unsigned long) tom; +} + |