printk_foo -> printk(BIOS_FOO, ...)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 15 insertions, 15 deletions

diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 5f71e19a90..1f5a0359c4 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -75,11 +75,11 @@ int add_northbridge_resources(struct lb_memory *mem)
 {
 	u32 pcie_config_base, pcie_config_size;
 
-	printk_debug("Adding UMA memory area\n");
+	printk(BIOS_DEBUG, "Adding UMA memory area\n");
 	lb_add_memory_range(mem, LB_MEM_RESERVED,
 		uma_memory_base, uma_memory_size);
 
-	printk_debug("Adding PCIe config bar\n");
+	printk(BIOS_DEBUG, "Adding PCIe config bar\n");
 	get_pcie_bar(&pcie_config_base, &pcie_config_size);
 	lb_add_memory_range(mem, LB_MEM_RESERVED,
 		pcie_config_base, pcie_config_size);
@@ -140,13 +140,13 @@ static void pci_domain_set_resources(device_t dev)
 	 * this way?
 	 */
 	pci_tolm = find_pci_tolm(&dev->link[0]);
-	printk_debug("pci_tolm: 0x%x\n", pci_tolm);
+	printk(BIOS_DEBUG, "pci_tolm: 0x%x\n", pci_tolm);
 
-	printk_spew("Base of stolen memory: 0x%08x\n",
+	printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n",
 		    pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c));
 
 	tolud = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), 0x9c);
-	printk_spew("Top of Low Used DRAM: 0x%08x\n", tolud << 24);
+	printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08x\n", tolud << 24);
 
 	tomk = tolud << 14;
 
@@ -154,7 +154,7 @@ static void pci_domain_set_resources(device_t dev)
 	reg8 = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), 0x9e);
 	if (reg8 & 1) {
 		int tseg_size = 0;
-		printk_debug("TSEG decoded, subtracting ");
+		printk(BIOS_DEBUG, "TSEG decoded, subtracting ");
 		reg8 >>= 1;
 		reg8 &= 3;
 		switch (reg8) {
@@ -169,14 +169,14 @@ static void pci_domain_set_resources(device_t dev)
 			break;	/* TSEG = 8M */
 		}
 
-		printk_debug("%dM\n", tseg_size >> 10);
+		printk(BIOS_DEBUG, "%dM\n", tseg_size >> 10);
 		tomk -= tseg_size;
 	}
 
 	reg16 = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), GGC);
 	if (!(reg16 & 2)) {
 		int uma_size = 0;
-		printk_debug("IGD decoded, subtracting ");
+		printk(BIOS_DEBUG, "IGD decoded, subtracting ");
 		reg16 >>= 4;
 		reg16 &= 7;
 		switch (reg16) {
@@ -188,7 +188,7 @@ static void pci_domain_set_resources(device_t dev)
 			break;
 		}
 
-		printk_debug("%dM UMA\n", uma_size >> 10);
+		printk(BIOS_DEBUG, "%dM UMA\n", uma_size >> 10);
 		tomk -= uma_size;
 
 		/* For reserving UMA memory in the memory map */
@@ -199,8 +199,8 @@ static void pci_domain_set_resources(device_t dev)
 	/* The following needs to be 2 lines, otherwise the second
 	 * number is always 0
 	 */
-	printk_info("Available memory: %dK", (uint32_t)tomk);
-	printk_info(" (%dM)\n", (uint32_t)(tomk >> 10));
+	printk(BIOS_INFO, "Available memory: %dK", (uint32_t)tomk);
+	printk(BIOS_INFO, " (%dM)\n", (uint32_t)(tomk >> 10));
 
 	/* Report the memory regions */
 	ram_resource(dev, 3, 0, 640);
@@ -253,7 +253,7 @@ static void mc_read_resources(device_t dev)
 	resource->flags =
 	    IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |
 	    IORESOURCE_ASSIGNED;
-	printk_debug("Adding PCIe enhanced config space BAR 0x%08lx-0x%08lx.\n",
+	printk(BIOS_DEBUG, "Adding PCIe enhanced config space BAR 0x%08lx-0x%08lx.\n",
 		     (unsigned long)(resource->base), (unsigned long)(resource->base + resource->size));
 }
 
@@ -289,15 +289,15 @@ static void northbridge_init(struct device *dev)
 {
 	switch (pci_read_config32(dev, SKPAD)) {
 	case 0xcafebabe:
-		printk_debug("Normal boot.\n");
+		printk(BIOS_DEBUG, "Normal boot.\n");
 		acpi_slp_type=0;
 		break;
 	case 0xcafed00d:
-		printk_debug("S3 Resume.\n");
+		printk(BIOS_DEBUG, "S3 Resume.\n");
 		acpi_slp_type=3;
 		break;
 	default:
-		printk_debug("Unknown boot method, assuming normal.\n");
+		printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
 		acpi_slp_type=0;
 		break;
 	}