diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-20 13:00:02 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-30 23:13:05 +0000 |
| commit | a6b0922aa1c4f685056d3dab75a3b330b91b36bd (patch) | |
| tree | 7eb7c0e41bc5c6447ff019331d69e9dac90eeb20 /src/northbridge/intel/i945/i945.h | |
| parent | 1ac6f8b804b0be461f5254a6bace3a9823177ba3 (diff) | |
nb/intel/i945: Define and use MMCONF_BUS_NUMBER
Change-Id: I5c75409fd3b7b018e402c471cbd856eca20278b7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49757
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/i945/i945.h')
| -rw-r--r-- | src/northbridge/intel/i945/i945.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index e809794700..b3c28aebd1 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -353,8 +353,6 @@ void sdram_dump_mchbar_registers(void); u32 decode_igd_memory_size(u32 gms); u32 decode_tseg_size(const u8 esmramc); -int decode_pcie_bar(u32 *const base, u32 *const len); - /* Romstage mainboard callbacks */ /* Optional: Override the default LPC config. */ void mainboard_lpc_decode(void); |