nb/intel/i945: Use DEBUG_RAM_SETUP

Avoid preprocessor here, also we never set loglevel
to value of >8 so the call would not be made.

The calls to ram_check() were removed, for a long
time that function has not tested start..stop region.

Change-Id: Ib952b8905c29a5c5c289027071eb6ff59aaa330b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 2 insertions, 16 deletions

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index d3ed27745d..08dd6752d6 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -940,22 +940,8 @@ void i945_late_initialization(int s3resume)
 
 	i945_setup_root_complex_topology();
 
-#if !CONFIG(HAVE_ACPI_RESUME)
-#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
-#if CONFIG(DEBUG_RAM_SETUP)
-	sdram_dump_mchbar_registers();
-
-	{
-		/* This will not work if TSEG is in place! */
-		u32 tom = pci_read_config32(PCI_DEV(0, 2, 0), BSM);
-
-		printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
-		ram_check(0x00000000, 0x000a0000);
-		ram_check(0x00100000, tom);
-	}
-#endif
-#endif
-#endif
+	if (CONFIG(DEBUG_RAM_SETUP))
+		sdram_dump_mchbar_registers();
 
 	MCHBAR16(SSKPD) = 0xCAFE;