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authorStefan Reinauer <stepan@coresystems.de>2009-10-26 17:12:21 +0000
committerStefan Reinauer <stepan@openbios.org>2009-10-26 17:12:21 +0000
commitaca6ec66bf7048e77ec960bb751a04e6b0528c70 (patch)
treef8fbc185686787e9453f0e6f229d88f38561333d /src/northbridge/intel/i945/acpi
parent3b314023802c7429012e5f09652047e0b32fb97a (diff)
Kontron 986LCD-M update
- run ACPI code through preprocessor so we get the same values as the C code - fix PCIe x16 slot - fix ICH7 Azalia/HDA driver - SMI/GNVS update security fix (only allow struct pointer update once) - ACPI updates - IDE driver fixes - add cmos options for disabling onboard ethernet and controlling system fan Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i945/acpi')
-rw-r--r--src/northbridge/intel/i945/acpi/i945.asl17
-rw-r--r--src/northbridge/intel/i945/acpi/i945_hostbridge.asl5
2 files changed, 13 insertions, 9 deletions
diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl
index 420ba0e592..9511925a69 100644
--- a/src/northbridge/intel/i945/acpi/i945.asl
+++ b/src/northbridge/intel/i945/acpi/i945.asl
@@ -19,7 +19,8 @@
* MA 02110-1301 USA
*/
-Include ("../../../northbridge/intel/i945/acpi/i945_hostbridge.asl")
+#include "../../../northbridge/intel/i945/acpi/i945_hostbridge.asl"
+#include "../../../northbridge/intel/i945/i945.h"
/* PCI Device Resource Consumption */
Device (PDRC)
@@ -41,10 +42,10 @@ Device (PDRC)
Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
- Memory32Fixed(ReadWrite, 0xfed14000, 0x00004000) // MCHBAR
- Memory32Fixed(ReadWrite, 0xfed18000, 0x00001000) // DMIBAR
- Memory32Fixed(ReadWrite, 0xfed19000, 0x00001000) // EPBAR
- Memory32Fixed(ReadWrite, 0xf0000000, 0x04000000) // PCIE BAR
+ Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000)
+ Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
+ Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
+ Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)
Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH
Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH
Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH
@@ -76,13 +77,13 @@ Device (PDRC)
}
// PCIe graphics port 0:1.0
-Include ("../../../northbridge/intel/i945/acpi/i945_peg.asl")
+#include "../../../northbridge/intel/i945/acpi/i945_peg.asl"
// Integrated graphics 0:2.0
-Include ("../../../northbridge/intel/i945/acpi/i945_igd.asl")
+#include "../../../northbridge/intel/i945/acpi/i945_igd.asl"
Scope (\)
{
// backlight control, display switching, lid
- Include ("acpi/video.asl")
+ #include "acpi/video.asl"
}
diff --git a/src/northbridge/intel/i945/acpi/i945_hostbridge.asl b/src/northbridge/intel/i945/acpi/i945_hostbridge.asl
index 9e9c43611b..554adc0367 100644
--- a/src/northbridge/intel/i945/acpi/i945_hostbridge.asl
+++ b/src/northbridge/intel/i945/acpi/i945_hostbridge.asl
@@ -23,6 +23,9 @@
Name(_HID,EISAID("PNP0A08")) // PCIe
Name(_CID,EISAID("PNP0A03")) // PCI
+Name(_ADR, 0)
+Name(_BBN, 0)
+
Device (MCHC)
{
Name(_ADR, 0x00000000) // 0:0.0
@@ -232,6 +235,6 @@ Method (_CRS, 0, Serialized)
}
/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */
-Include ("acpi/i945_pci_irqs.asl")
+#include "acpi/i945_pci_irqs.asl"