diff options
| author | Shelley Chen <shchen@google.com> | 2021-10-20 15:43:45 -0700 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2021-11-10 17:24:16 +0000 |
| commit | 4e9bb3308e811000eb089be6b03658e4cb9a4717 (patch) | |
| tree | dca19104e9f6144736a042203f53de9802b53a7e /src/northbridge/intel/i945/acpi/i945.asl | |
| parent | 5c163bb86926d982af1ffd93b072ca85070ca1e1 (diff) | |
Rename ECAM-specific MMCONF Kconfigs
Currently, the MMCONF Kconfigs only support the Enhanced Configuration
Access mechanism (ECAM) method for accessing the PCI config address
space. Some platforms have a different way of mapping the PCI config
space to memory. This patch renames the following configs to
make it clear that these configs are ECAM-specific:
- NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT
- MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT
- MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS
- MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER
- MMCONF_LENGTH --> ECAM_MMCONF_LENGTH
Please refer to CB:57861 "Proposed coreboot Changes" for more
details.
BUG=b:181098581
BRANCH=None
TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max
Make sure Jenkins verifies that builds on other boards
Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/northbridge/intel/i945/acpi/i945.asl')
| -rw-r--r-- | src/northbridge/intel/i945/acpi/i945.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl index 683ad375a5..f935b716f6 100644 --- a/src/northbridge/intel/i945/acpi/i945.asl +++ b/src/northbridge/intel/i945/acpi/i945.asl @@ -40,7 +40,7 @@ Device (PDRC) Memory32Fixed(ReadWrite, CONFIG_FIXED_MCHBAR_MMIO_BASE, 0x00004000) Memory32Fixed(ReadWrite, CONFIG_FIXED_DMIBAR_MMIO_BASE, 0x00001000) Memory32Fixed(ReadWrite, CONFIG_FIXED_EPBAR_MMIO_BASE, 0x00001000) - Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_MMCONF_LENGTH) + Memory32Fixed(ReadWrite, CONFIG_ECAM_MMCONF_BASE_ADDRESS, CONFIG_ECAM_MMCONF_LENGTH) Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH |