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authorStefan Reinauer <stefan.reinauer@coreboot.org>2013-02-27 23:45:20 +0100
committerRonald G. Minnich <rminnich@gmail.com>2013-02-28 00:00:30 +0100
commitfd611f9c2c8c751069c6cd1634a3e3e523ff098b (patch)
tree3e1d3d844987a6f02d406e13f68aa37e3f55ec7e /src/northbridge/intel/i5000
parent9c29cfae8cc6214478a0a555e6901779eb19ef54 (diff)
Drop CONFIG_WRITE_HIGH_TABLES
It's been on for all boards per default since several years now and the old code path probably doesn't even work anymore. Let's just have one consistent way of doing things. Change-Id: I58da7fe9b89a648d9a7165d37e0e35c88c06ac7e Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2547 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/intel/i5000')
-rw-r--r--src/northbridge/intel/i5000/northbridge.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/northbridge/intel/i5000/northbridge.c b/src/northbridge/intel/i5000/northbridge.c
index c9b99a980c..cd1abc8cd9 100644
--- a/src/northbridge/intel/i5000/northbridge.c
+++ b/src/northbridge/intel/i5000/northbridge.c
@@ -28,9 +28,6 @@
#include <cpu/cpu.h>
#include <arch/acpi.h>
#include <cbmem.h>
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
@@ -114,12 +111,10 @@ static void mc_read_resources(device_t dev)
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = tolm - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "high_tables_base: %08llx, size %lld\n", high_tables_base, high_tables_size);
-#endif
}
static struct pci_operations intel_pci_ops = {