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authorElyes Haouas <ehaouas@noos.fr>2024-06-01 18:12:16 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-07-10 12:55:46 +0000
commite7fa24470dc3b3403eabd757a87cfb993f316b1a (patch)
tree6497bd70076905089fc81ed777cbec34486569c0 /src/northbridge/intel/i440bx
parenta9997f891facaf3c855d7f2c9c6840acbf101193 (diff)
cbmem_top: Change the return value to uintptr_t
Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82752 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/i440bx')
-rw-r--r--src/northbridge/intel/i440bx/memmap.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/i440bx/memmap.c b/src/northbridge/intel/i440bx/memmap.c
index 204e83badf..8bdd5d9c6a 100644
--- a/src/northbridge/intel/i440bx/memmap.c
+++ b/src/northbridge/intel/i440bx/memmap.c
@@ -53,10 +53,8 @@ uintptr_t cbmem_top_chipset(void)
void fill_postcar_frame(struct postcar_frame *pcf)
{
- uintptr_t top_of_ram;
-
/* Cache CBMEM region as WB. */
- top_of_ram = (uintptr_t)cbmem_top();
+ const uintptr_t top_of_ram = cbmem_top();
postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB,
MTRR_TYPE_WRBACK);
}