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author | Raul E Rangel <rrangel@chromium.org> | 2020-12-15 13:37:24 -0700 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-01-05 19:53:41 +0000 |
commit | a553600e187614626f81b72a6e9d9477ae5a5158 (patch) | |
tree | f4170e0825a1308bf99c921f619b7b3fb070f127 /src/northbridge/intel/i440bx/Makefile.inc | |
parent | 7ace66e094de7524d9ee7e8286a5318c549eae73 (diff) |
mb/google/zork: Add INT[E-H] to FCH PIR
INT[E-H] are required because the GNB IO-APIC maps the 32 interrupts
onto the 8 INT[A-H] that feed into the FCH PIC/IO-APIC.
BUG=b:170595019
TEST=Verify ezkinil still boots
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I9c6689e212b136f6f3c64152803ed161b2284275
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48664
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/i440bx/Makefile.inc')
0 files changed, 0 insertions, 0 deletions