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| author | Eugene Myers <edmyers@tycho.nsa.gov> | 2020-02-06 10:37:01 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-06 16:19:04 +0000 |
| commit | faa1118fc7d6d80d9c37bab8b9330325d8157466 (patch) | |
| tree | ec380f5fa25d805adb42897f555dfefa80e0d99a /src/northbridge/intel/haswell | |
| parent | 7354605f869b60a9f3bf3495dee4ccdceb0da0a4 (diff) | |
cpu/x86: Put guard around align for smm_save_state_size
The STM support aligns the smm_save_state_size. However, this creates
issue for some platforms because of this value being hard coded to
0x400
Signed-off-by: Eugene D. Myers <edmyers@tycho.nsa.gov>
Change-Id: Ia584f7e9b86405a12eb6cbedc3a2615a8727f69e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38734
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: ron minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/haswell')
0 files changed, 0 insertions, 0 deletions