diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-08 20:03:18 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-10 23:42:10 +0100 |
| commit | 9e94dbfcd089db31b2201381f9d83a89cdea86b9 (patch) | |
| tree | f73b282c8e37e29966f6a86419ceead0f6e5f39a /src/northbridge/intel/haswell | |
| parent | a63719407fc5fad17eebe0e5086511a511466353 (diff) | |
ACPI: Get S3 resume state from romstage_handoff
There is nothing platform specific in retrieving S3 resume state from
romstage_handoff structure. Boards without EARLY_CBMEM_INIT update
acpi_slp_type from ACPI power-management block or scratchpad registers.
Change-Id: Ifc3755f891a0810473b3216c1fec8e45908fc1ab
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8188
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/northbridge/intel/haswell')
| -rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 4909824d19..7eb9f08c60 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -35,7 +35,6 @@ #include <cpu/x86/smm.h> #include <boot/tables.h> #include <cbmem.h> -#include <romstage_handoff.h> #include "chip.h" #include "haswell.h" @@ -433,26 +432,6 @@ static void northbridge_init(struct device *dev) MCHBAR32(0x5500) = 0x00100001; } -static void northbridge_enable(device_t dev) -{ -#if CONFIG_HAVE_ACPI_RESUME - struct romstage_handoff *handoff; - - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff == NULL) { - printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n"); - acpi_slp_type = 0; - } else if (handoff->s3_resume) { - printk(BIOS_DEBUG, "S3 Resume.\n"); - acpi_slp_type = 3; - } else { - printk(BIOS_DEBUG, "Normal boot.\n"); - acpi_slp_type = 0; - } -#endif -} - static struct pci_operations intel_pci_ops = { .set_subsystem = intel_set_subsystem, }; @@ -462,7 +441,6 @@ static struct device_operations mc_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = northbridge_init, - .enable = northbridge_enable, .acpi_fill_ssdt_generator = generate_cpu_entries, .scan_bus = 0, .ops_pci = &intel_pci_ops, |