aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/haswell
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-01-06 07:08:46 +0100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2015-01-06 11:19:28 +0100
commit9b29aad5263f2aeba21cf4d521e7798f9dedb2b9 (patch)
treee513c718c9cb6960c4be58d2e5c299a0bab968f7 /src/northbridge/intel/haswell
parent6355cbff51966144d5b709a73e24622df3e96122 (diff)
Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'"
This reverts commit 9270553fff23462fcb298f154296319bf3639d15. Change-Id: I195f721ce7a18aac6c1aa6f4e0f9284455d531b0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8138 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/northbridge/intel/haswell')
-rw-r--r--src/northbridge/intel/haswell/mrccache.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c
index 88af78973d..a921e048dd 100644
--- a/src/northbridge/intel/haswell/mrccache.c
+++ b/src/northbridge/intel/haswell/mrccache.c
@@ -33,6 +33,11 @@
#include <vendorcode/google/chromeos/fmap.h>
#endif
+/* convert a pointer to flash area into the offset inside the flash */
+static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {
+ return ((u32)p + flash->size);
+}
+
static struct mrc_data_container *next_mrc_block(
struct mrc_data_container *mrc_cache)
{
@@ -223,7 +228,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
update_mrc_cache, NULL),
};
-#endif /* !defined(__PRE_RAM__) */
+#endif
struct mrc_data_container *find_current_mrc_cache(void)
{