diff options
author | Subrata Banik <subrata.banik@intel.com> | 2018-12-10 14:11:35 +0530 |
---|---|---|
committer | Subrata Banik <subrata.banik@intel.com> | 2018-12-13 04:32:57 +0000 |
commit | 53b08c347f54970cf5f6ce35b8e1a1fe5f8a11f9 (patch) | |
tree | b4eed19fbf1b9f35dfbdddcc43fc84469176ec59 /src/northbridge/intel/haswell | |
parent | e3110b862071ae0797afb0688495315a7dd47739 (diff) |
cpuid: Add helper function for cpuid(1) functions
This patch introduces 3 helper function for cpuid(1) :
1. cpu_get_cpuid() -> to get processor id (from cpuid.eax)
2. cpu_get_feature_flags_ecx -> to get processor feature flag (from cpuid.ecx)
3. cpu_get_feature_flags_edx -> to get processor feature flag (from cpuid.edx)
Above 3 helper functions are targeted to replace majority of cpuid(1)
references.
Change-Id: Ib96a7c79dadb1feff0b8d58aa408b355fbb3bc50
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/30123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/northbridge/intel/haswell')
-rw-r--r-- | src/northbridge/intel/haswell/report_platform.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c index 04ef3d5ec9..1bc31108f5 100644 --- a/src/northbridge/intel/haswell/report_platform.c +++ b/src/northbridge/intel/haswell/report_platform.c @@ -24,7 +24,7 @@ static void report_cpu_info(void) { struct cpuid_result cpuidr; - u32 i, index; + u32 i, index, cpu_id, cpu_feature_flag; char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; msr_t microcode_ver; @@ -51,12 +51,15 @@ static void report_cpu_info(void) microcode_ver.lo = 0; microcode_ver.hi = 0; wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); - cpuidr = cpuid(1); + cpu_id = cpu_get_cpuid(); microcode_ver = rdmsr(IA32_BIOS_SIGN_ID); - printk(BIOS_DEBUG, "CPU id(%x) ucode:%08x %s\n", cpuidr.eax, microcode_ver.hi, cpu_name); - aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; - txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; - vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0; + printk(BIOS_DEBUG, "CPU id(%x) ucode:%08x %s\n", cpu_id, + microcode_ver.hi, cpu_name); + + cpu_feature_flag = cpu_get_feature_flags_ecx(); + aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; + txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0; + vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0; printk(BIOS_DEBUG, "AES %ssupported, TXT %ssupported, VT %ssupported\n", mode[aes], mode[txt], mode[vt]); } |