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authorT Michael Turney <mturney@codeaurora.org>2018-10-26 07:03:14 -0700
committerNico Huber <nico.h@gmx.de>2018-12-12 18:39:18 +0000
commit4ba64c99e3afc7689eab1f498134c43d40248d25 (patch)
tree220530dc1f5a0c3a15054cd94b80853811646e33 /src/northbridge/intel/haswell
parent82d6f90c5f5f3ede9e57503550fbe4408c59de3d (diff)
cheza: board-level GPIO support
Change-Id: I64e79904c7ad95091ea29d9f80444c4e3b493471 Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/29298 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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