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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2023-12-21 07:08:49 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-04 14:20:06 +0000 |
| commit | 68642ca981b0976f5d2f4a118ffc669ff0d2d660 (patch) | |
| tree | 7de14b1ec4f126c132ce5109205ac3eff5dc4fc4 /src/northbridge/intel/haswell/gma.c | |
| parent | 41a5954a6785bfad95dce36611b92f1123e350e2 (diff) | |
nb/intel/sandybridge/raminit: Honor SPD's dll_off_mode
In DDR3 DLL-Off mode is an optional feature advertised by SPD.
Honor the SPD and only use DLL-Off mode when all DIMMs on the
same channel indicate support for it.
The same is done on MRC.bin.
Tested on Lenovo X220: Still boots fine.
Change-Id: Ief4bfb9e045cad7ff9953f6fda248586ea951a52
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79758
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/haswell/gma.c')
0 files changed, 0 insertions, 0 deletions