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authorAngel Pons <th3fanbus@gmail.com>2021-01-20 01:10:48 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-12 07:52:25 +0000
commitf95b9b4b092837663b6fa1cf42ce312338dee5c3 (patch)
treef6357a2e6b866a1bad014f17f946cc68b7ecd7e0 /src/northbridge/intel/haswell/Kconfig
parentea573b04d8da056ce41833975cadf58df843c01e (diff)
nb/intel/haswell: Use common {DMI,EP,MCH}BAR accessors
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical. Change-Id: I3ff4577ce662697cb3d8fb34003217fd6275dd42 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/northbridge/intel/haswell/Kconfig')
-rw-r--r--src/northbridge/intel/haswell/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index dcc9162fd0..e3f9aec266 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -108,4 +108,13 @@ config ENABLE_DDR_2X_REFRESH
This probably only happens when the DRAM gets hot, but what MRC exactly
does when this setting is enabled has not been investigated.
+config FIXED_MCHBAR_MMIO_BASE
+ default 0xfed10000
+
+config FIXED_DMIBAR_MMIO_BASE
+ default 0xfed18000
+
+config FIXED_EPBAR_MMIO_BASE
+ default 0xfed19000
+
endif