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| author | Arthur Heymans <arthur@aheymans.xyz> | 2024-01-25 16:40:50 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2024-08-05 08:28:44 +0000 |
| commit | a2180b33351e63187b6de834d3a3fd30ea8b500c (patch) | |
| tree | c05ee4a146e577bcd898eae956ebc2c775ce71ee /src/northbridge/intel/haswell/Kconfig | |
| parent | f7eef77963471ad8bdcfc59e92a6b949d7a254ef (diff) | |
nb/intel/*: Match ACPI with resource allocation
Currently resource allocation starts top down from the default value
0xfe000000. This does not match what ACPI reports, so adapt
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT to reflect that.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I2ba0e96a7ab18d65b7fbbb38b1a979ea2ec6d1be
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80207
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/haswell/Kconfig')
| -rw-r--r-- | src/northbridge/intel/haswell/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 4b83a25bc1..35403373e7 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -60,6 +60,10 @@ config ECAM_MMCONF_BUS_NUMBER int default 64 +# This number must be equal or lower than what's reported in ACPI PCI _CRS +config DOMAIN_RESOURCE_32BIT_LIMIT + default ECAM_MMCONF_BASE_ADDRESS + config DCACHE_RAM_BASE hex default 0xff7c0000 |