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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-12-22 12:28:07 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-01-27 22:48:06 +0100
commitf1e3c763b3eef15dbfae73f485408a0dec230d00 (patch)
tree28682b0d4ad36063b3612c8a774af868a3e55878 /src/northbridge/intel/gm45
parent91fac61240612291f7be3362f7acad31803e8b03 (diff)
CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM
The name was always obscure and confusing. Instead define cbmem_top() directly in the chipset code for x86 like on ARMs. TODO: Check TSEG alignment, it used for MTRR programming. Change-Id: Ibbe5f05ab9c7d87d09caa673766cd17d192cd045 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7888 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/northbridge/intel/gm45')
-rw-r--r--src/northbridge/intel/gm45/ram_calc.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/ram_calc.c
index c8c15d3a76..d9d335709f 100644
--- a/src/northbridge/intel/gm45/ram_calc.c
+++ b/src/northbridge/intel/gm45/ram_calc.c
@@ -86,7 +86,7 @@ u32 decode_igd_gtt_size(const u32 gsm)
}
}
-unsigned long get_top_of_ram(void)
+static uintptr_t smm_region_start(void)
{
const pci_devfn_t dev = PCI_DEV(0, 0, 0);
@@ -105,3 +105,8 @@ unsigned long get_top_of_ram(void)
}
return tor;
}
+
+void *cbmem_top(void)
+{
+ return (void *) smm_region_start();
+}