diff options
| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2022-05-13 19:06:01 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-17 11:23:43 +0000 |
| commit | 82a8d8172ceef623b78a27bf00b4b9c084623501 (patch) | |
| tree | 36534e586c39297dfc00a89c3df59f338fff6e10 /src/northbridge/intel/gm45/pm.c | |
| parent | 97144eee858c869c4f30813b3c9f2625f746fc15 (diff) | |
mb/google/brya/var/kinox: Set memory SMBus addresses to 0x52, 0x50
Follow the Kinox_schematic_R01_20220418.pdf to set memory SMBus
addresses to 0x52, 0x50.
BUG=b:231398371
TEST=Build and boot to OS with either 1 or 2 DIMM slots populated.
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I32bb4f62a6b8a485ac757a60f5d16adb69109e2f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/northbridge/intel/gm45/pm.c')
0 files changed, 0 insertions, 0 deletions