diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-08-29 22:51:41 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-13 17:21:02 +0200 |
| commit | 25f75b28e4e545eb2c42e4e201055661e57a90ca (patch) | |
| tree | 486df3a3e3c18d9e268f8503a640bd3fc2dc502b /src/northbridge/intel/gm45/iommu.c | |
| parent | 823f1a9bbfc5daf72e5f2f76bf2034b250396d9d (diff) | |
northbridge/intel/gm45: transation away from device_t
Replace the use of the old device_t definition inside
northbridge/intel/gm45.
The patch has been tested both with the arch/io.h definition of device_t
enabled and disabled in order to ensure compatibility while the
transaction takes place.
Change-Id: I87754799f922cf241fb456071bac04e6fe1eab34
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16402
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/gm45/iommu.c')
| -rw-r--r-- | src/northbridge/intel/gm45/iommu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c index 0c3c18ef0c..77aba94b4a 100644 --- a/src/northbridge/intel/gm45/iommu.c +++ b/src/northbridge/intel/gm45/iommu.c @@ -48,7 +48,7 @@ void init_iommu() /* clear GTT */ u32 gtt = pci_read_config16(PCI_DEV(0, 0, 0), 0x52); if (gtt & 0x400) { /* VT mode */ - device_t igd = PCI_DEV(0, 2, 0); + pci_devfn_t igd = PCI_DEV(0, 2, 0); /* setup somewhere */ u8 cmd = pci_read_config8(igd, PCI_COMMAND); @@ -67,7 +67,7 @@ void init_iommu() if (stepping == STEPPING_B3) { MCHBAR8(0xffc) |= 1 << 4; - device_t peg = PCI_DEV(0, 1, 0); + pci_devfn_t peg = PCI_DEV(0, 1, 0); /* FIXME: proper test? */ if (pci_read_config8(peg, PCI_CLASS_REVISION) != 0xff) { int val = pci_read_config32(peg, 0xfc) | (1 << 15); |