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authorAngel Pons <th3fanbus@gmail.com>2021-03-27 13:52:43 +0100
committerNico Huber <nico.h@gmx.de>2021-04-10 16:04:20 +0000
commit3f1f8ef931aa92c72006dd363d178336911e224c (patch)
tree873d802eb3bfbae15eeb58da8b87de88b062c122 /src/northbridge/intel/gm45/igd.c
parent677ac698680f31a83086245f3b741dcb79da6fc4 (diff)
nb/intel/gm45: Use new fixed BAR accessors
Tested with BUILD_TIMELESS=1, Roda RK9 remains identical. Change-Id: I18f40d1bc3172b3c1b6b4828cefdb91aea679ba2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51880 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45/igd.c')
-rw-r--r--src/northbridge/intel/gm45/igd.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c
index 102af1c4c3..f4a0e0c682 100644
--- a/src/northbridge/intel/gm45/igd.c
+++ b/src/northbridge/intel/gm45/igd.c
@@ -22,8 +22,8 @@ static void enable_igd(const sysinfo_t *const sysinfo, const int no_peg)
printk(BIOS_DEBUG, "Enabling IGD.\n");
/* HSync/VSync */
- MCHBAR8(0xbd0 + 3) = 0x5a;
- MCHBAR8(0xbd0 + 4) = 0x5a;
+ mchbar_write8(0xbd0 + 3, 0x5a);
+ mchbar_write8(0xbd0 + 4, 0x5a);
static const u16 display_clock_from_f0_and_vco[][4] = {
/* VCO 2666 VCO 3200 VCO 4000 VCO 5333 */
@@ -58,7 +58,7 @@ static void enable_igd(const sysinfo_t *const sysinfo, const int no_peg)
/* Disable PEG finally. */
printk(BIOS_DEBUG, "Finally disabling "
"PEG in favor of IGD.\n");
- MCHBAR8(0xc14) |= (1 << 5) | (1 << 0);
+ mchbar_setbits8(0xc14, 1 << 5 | 1 << 0);
pci_or_config32(peg_dev, 0x200, 1 << 18);
@@ -70,7 +70,7 @@ static void enable_igd(const sysinfo_t *const sysinfo, const int no_peg)
;
pci_write_config32(mch_dev, D0F0_DEVEN, deven & ~2);
- MCHBAR8(0xc14) &= ~((1 << 5) | (1 << 0));
+ mchbar_clrbits8(0xc14, 1 << 5 | 1 << 0);
}
}
}
@@ -84,12 +84,12 @@ static void disable_igd(const sysinfo_t *const sysinfo)
/* Disable Graphics Stolen Memory. */
pci_update_config16(mch_dev, D0F0_GGC, 0xff0f, 0x0002);
- MCHBAR8(0xf10) |= (1 << 0);
+ mchbar_setbits8(0xf10, 1 << 0);
if (!(pci_read_config8(mch_dev, D0F0_CAPID0 + 4) & (1 << (33 - 32)))) {
- MCHBAR16(0x1190) |= (1 << 14);
- MCHBAR16(0x119e) = (MCHBAR16(0x119e) & ~(7 << 13)) | (4 << 13);
- MCHBAR16(0x119e) |= (1 << 12);
+ mchbar_setbits16(0x1190, 1 << 14);
+ mchbar_clrsetbits16(0x119e, 7 << 13, 4 << 13);
+ mchbar_setbits16(0x119e, 1 << 12);
}
/* Hide IGD. */