diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-05-05 16:29:41 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-07 15:52:01 +0000 |
| commit | 1bc7b6e1350c4ba8eee10a859d10150b15b7b7e9 (patch) | |
| tree | 1751b8ebc3e6b6657d41d1b92e3e070fa8c8bb3e /src/northbridge/intel/gm45/early_reset.c | |
| parent | ba092a9ab6e87fec458d6557d0114147e2713686 (diff) | |
{gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() function
Use already defined system_reset() and full_reset() functions.
Change-Id: Ic29fab70cf7f23d49c3eeeb97c984c523f973972
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32608
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/gm45/early_reset.c')
| -rw-r--r-- | src/northbridge/intel/gm45/early_reset.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/northbridge/intel/gm45/early_reset.c b/src/northbridge/intel/gm45/early_reset.c index 9f919cfbcd..3f095a256f 100644 --- a/src/northbridge/intel/gm45/early_reset.c +++ b/src/northbridge/intel/gm45/early_reset.c @@ -16,8 +16,9 @@ #include <types.h> #include <arch/io.h> +#include <cf9_reset.h> #include <device/pci_ops.h> -#include <halt.h> + #include "gm45.h" void gm45_early_reset(void/*const timings_t *const timings*/) @@ -63,8 +64,5 @@ void gm45_early_reset(void/*const timings_t *const timings*/) /* Normally, we would set this after successful raminit. */ MCHBAR32(DCC_MCHBAR) |= (1 << 19); - /* Perform system reset through CF9 interface. */ - outb(0x02, 0xcf9); /* Set system reset bit. */ - outb(0x06, 0xcf9); /* Set CPU reset bit, too. */ - halt(); + system_reset(); } |