diff options
| author | Patrick Georgi <patrick.georgi@secunet.com> | 2012-11-06 11:03:53 +0100 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-11-27 09:16:18 +0100 |
| commit | 2efc8808b8bfaee0a0e8f3ee387ecd9a3f049705 (patch) | |
| tree | c486b184f7609b42b3de3d5cd5d213226820a278 /src/northbridge/intel/gm45/Kconfig | |
| parent | acd7d952514485dbc41fa04b0d16be4002e31019 (diff) | |
intel/gm45: new northbridge
The code supports DDR3 boards only. RAM init for DDR2 is sufficiently
different that it requires separate code, and we have no boards to
test that.
Change-Id: I9076546faf8a2033c89eb95f5eec524439ab9fe1
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1689
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45/Kconfig')
| -rw-r--r-- | src/northbridge/intel/gm45/Kconfig | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig new file mode 100644 index 0000000000..798e4016d8 --- /dev/null +++ b/src/northbridge/intel/gm45/Kconfig @@ -0,0 +1,31 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007-2009 coresystems GmbH +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config NORTHBRIDGE_INTEL_GM45 + bool + +if NORTHBRIDGE_INTEL_GM45 + +config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy + def_bool y + select HAVE_DEBUG_RAM_SETUP + select MMCONF_SUPPORT_DEFAULT + select IOMMU + +endif |