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authorJeffy Chen <jeffy.chen@rock-chips.com>2017-03-03 18:24:02 +0800
committerPatrick Georgi <pgeorgi@google.com>2017-04-28 06:49:01 +0200
commitb0b5987311793c8f9a7d62c8965063c609449032 (patch)
treef692a4e5beadf3b21212c59a955d0396120628d8 /src/northbridge/intel/fsp_rangeley
parentd1e3b9b7007d47e51499d0861427f6a6c554f7d6 (diff)
rockchip: gpio: add gpio_input_irq & gpio_irq_status
BUG=b:35647967 TEST=boot from bob Change-Id: I5de902ab26fe768b641f69d85a5294baf6d916e3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 223257d486b026c06a1f3a7a830b829efb9932dc Original-Change-Id: I055ad5f59285cee3110d1e7cb1a53a60144712e4 Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/452285 Original-Commit-Ready: Caesar Wang <wxt@rock-chips.com> Original-Tested-by: Caesar Wang <wxt@rock-chips.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/19433 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/fsp_rangeley')
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