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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-02-27 13:46:11 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-05-09 12:56:41 +0200 |
| commit | 4c4f56a6ba18b47d68d852ff3971ec91dbcb7ce4 (patch) | |
| tree | c449fa7ca81dd406dd2efce3a8c76ba95a7f2e18 /src/northbridge/intel/fsp_rangeley | |
| parent | e411f8eb72e3674d82f03fceaca27af4e64a9aaf (diff) | |
nb/x4x/nortbridge.c: Compute TSEG resource allocation dynamically
Computes TSEG size dynamically.
Changes the size of legacy hole to match other Intel northbirdges.
Refactor this a little by needing one less variable.
Change-Id: I0e6898c06a2bc1016eeaa3f002ff6c39657018ae
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18511
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/fsp_rangeley')
0 files changed, 0 insertions, 0 deletions