nb/sb/cpu: Drop Intel Rangeley support

Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.

Change-Id: I41589118579988617677cf48af5401bc35b23e05
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

1 files changed, 0 insertions, 42 deletions

diff --git a/src/northbridge/intel/fsp_rangeley/memmap.c b/src/northbridge/intel/fsp_rangeley/memmap.c
deleted file mode 100644
index 275ddd3ac1..0000000000
--- a/src/northbridge/intel/fsp_rangeley/memmap.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Google Inc.
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <cbmem.h>
-#include <device/pci_def.h>
-#include <drivers/intel/fsp1_0/fsp_util.h>
-
-#include "northbridge.h"
-
-static uintptr_t smm_region_start(void)
-{
-	/*
-	 * Calculate the top of usable (low) DRAM.
-	 * The FSP's reserved memory sits just below the SMM region,
-	 * allowing calculation of the top of usable memory.
-	 */
-	uintptr_t tom = sideband_read(B_UNIT, BMBOUND);
-	uintptr_t bsmmrrl = sideband_read(B_UNIT, BSMMRRL) << 20;
-	if (bsmmrrl) {
-		tom = bsmmrrl;
-	}
-
-	return tom;
-}
-
-void *cbmem_top_chipset(void)
-{
-	return (void *) (smm_region_start() - FSP_RESERVE_MEMORY_SIZE);
-}