diff options
| author | Marc Jones <marcj303@gmail.com> | 2016-09-20 20:14:15 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-02 18:36:37 +0100 |
| commit | 2cd67b72746d36186b42f068627e7d2c46e1aecf (patch) | |
| tree | d86a88e5650e0a39599f95f7756e50ba1f7f4832 /src/northbridge/amd/pi/00670F00/Kconfig | |
| parent | 24901165026731f9fef5e1c91abfca79dd0baa03 (diff) | |
northbridge/amd: Copy 00660F01 directories to 00670F00
Prepare for new 00670FF00 (StoneyRidge) support.
Original-Signed-off-by: Marc Jones <marcj303@gmail.com>
Original-Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Tested-by: Marshall Dawson <marshalldawson3rd@gmail.com>
(cherry picked from commit 037cf16883fafd329a15f903ddf97e24a879bcce)
Change-Id: I130d4f13beb2c1d71e4e4e9be5011f7993b34660
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/17142
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/amd/pi/00670F00/Kconfig')
| -rw-r--r-- | src/northbridge/amd/pi/00670F00/Kconfig | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/northbridge/amd/pi/00670F00/Kconfig b/src/northbridge/amd/pi/00670F00/Kconfig new file mode 100644 index 0000000000..f5d234d3d2 --- /dev/null +++ b/src/northbridge/amd/pi/00670F00/Kconfig @@ -0,0 +1,48 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2015 Advanced Micro Devices, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +config NORTHBRIDGE_AMD_PI_00660F01 + bool + select MMCONF_SUPPORT + +if NORTHBRIDGE_AMD_PI_00660F01 + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + +config HW_MEM_HOLE_SIZE_AUTO_INC + bool + default n + +config MMCONF_BASE_ADDRESS + hex + default 0xF8000000 + +config MMCONF_BUS_NUMBER + int + default 64 + +config VGA_BIOS_ID + string + default "1002,9870" + help + The default VGA BIOS PCI vendor/device ID should be set to the + result of the map_oprom_vendev() function in northbridge.c. + +config VGA_BIOS_FILE + string + default "3rdparty/blobs/northbridge/amd/00660F01/VBIOS.bin" + +endif |