diff options
| author | Myles Watson <mylesgw@gmail.com> | 2009-07-02 18:56:24 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-07-02 18:56:24 +0000 |
| commit | 29cc9eda2021a87396ef31a6fc81daff6fd1be7a (patch) | |
| tree | d3dfa07ca85547c77c5d07825fc8afcc19489076 /src/northbridge/amd/lx | |
| parent | 2468331952bae0abdc4d76dbe6cf26f05b7825e5 (diff) | |
Move the v3 resource allocator to v2.
Major changes:
1. Separate resource allocation into:
A. Read Resources
B. Avoid fixed resources (constrain limits)
C. Allocate resources
D. Set resources
Usage notes:
Resources which have IORESOURCE_FIXED set in the flags constrain the placement
of other resources. All fixed resources will end up outside (above or below)
the allocated resources.
Domains usually start with base = 0 and limit = 2^address_bits - 1.
I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is
still there for resources. Some platforms may want to change that, but I didn't
want to break anyone's board.
Resources are allocated in a single block for memory and another for I/O.
Currently the resource allocator doesn't support holes.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/lx')
| -rw-r--r-- | src/northbridge/amd/lx/northbridge.c | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c index c765377054..b2670843f5 100644 --- a/src/northbridge/amd/lx/northbridge.c +++ b/src/northbridge/amd/lx/northbridge.c @@ -74,8 +74,6 @@ #define IOD_BM(msr, pdid1, bizarro, ibase, imask) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(ibase>>12), .lo=(ibase<<20)|imask}} #define IOD_SC(msr, pdid1, bizarro, en, wen, ren, ibase) {msr, {.hi=(pdid1<<29)|(bizarro<<28), .lo=(en<<24)|(wen<<21)|(ren<<20)|(ibase<<3)}} -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - extern void graphics_init(void); extern void cpubug(void); extern void chipsetinit(void); @@ -382,24 +380,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = PCI_DEVICE_ID_AMD_LXBRIDGE, }; -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - printk_spew(">> Entering northbridge.c: %s\n", __func__); - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->limit = 0xffffUL; - resource->flags = - IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = - IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -470,14 +450,6 @@ static void pci_domain_enable(device_t dev) pci_set_method(dev); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - printk_spew(">> Entering northbridge.c: %s\n", __func__); - - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, |